The present invention relates to a liquid crystal display device including switching elements such as thin film transistors (TFT) on each picture element and relates to a manufacturing method thereof.
The following describes an arrangement of a conventional liquid crystal display device in which a peripheral driving circuit is formed on one of paired substrates with reference to FIGS. 16 through 18.
FIG. 16 is a plan view showing a substrate on which a peripheral driving circuit is formed, and FIG. 17 is a drawing showing a layout of one picture element. Moreover, FIG. 18 is a cross-sectional view taken along line 18xe2x80x9418 in FIG. 17.
As shown in FIG. 16, a gate driving circuit 32, a source driving circuit 33 and a TFT array section 34 are formed on an insulating substrate 31 which is one of the substrates in the liquid crystal display device. As the insulating substrate 31, a glass substrate, a quartz substrate or the like is used. The gate driving circuit 32 is composed of a shift register 32a and a buffer 32b. Moreover, the source driving circuit 33 is composed of a shift register 33a, a buffer 33b and analog switches 39. The analog switches 39 sample video signals to be inputted from the outside to a video line 38.
A plurality of parallel gate bus wirings 116 which are extended from the gate driving circuit 32 are wired on the TFT array section 34. Moreover, a plurality of parallel source bus wirings 120 extend from the source driving circuit 33 wired on the TFT array section 34 so as to perpendicularly intersect to the gate bus wirings 116. The analog switches 39 are connected respectively to the source bus wirings 120. Moreover, additional capacity common wirings 114 are wired on the TFT array section 34 so as to be parallel with the gate bus wirings 116. Rectangular domains which are surrounded respectively by two gate bus wirings 116, two source bus wirings 120 and two additional capacity common wirings 114 are provided with thin film transistors (i.e. TFT) 35, picture elements 36 and additional capacities 37. The TFT 35 functions as a switching element which electrically connects the picture element 36, the gate bus wiring 116 and the source bus wiring 120. A gate electrode of the TFT 35 is connected to the gate bus wiring 116, and a source electrode of the TFT 35 is connected to the source bus wiring 120.
A drain electrode of the TFT 35 is connected to a picture element electrode of the picture element 36. The picture element 36 is composed of the picture element electrode, a counter electrode provided on a counter substrate which faces the insulating substrate 31, and a liquid crystal layer sealed between the picture element electrode and the counter electrode. Moreover, the additional capacity common wiring 114 is connected to a electrode having the same electric potential as the counter electrode.
The following details the arrangement of the conventional TFT array section 34 in FIG. 16 with reference to FIGS. 17 and 18. A polycrystal silicon thin film 111 which is used as an active layer of the TFT 35 is formed on the insulating substrate 31 so as to have a thickness of, for example, 40 nm-80 nm. Then, a gate insulating film 113 is formed so as to have a thickness of, for example, 80 nm-150 nm by the sputtering or CVD method.
Phosphorus ions (P+) with concentration of 1xc3x971015 (cmxe2x88x922) are implanted into a section 110 (a shaded portion in FIGS. 17 and 18) of the polycrystal silicon thin film 111 where the additional capacity 37 will be formed.
A metal or polycrystal silicon layer with low resistance which is used as the gate bus wiring 116 and the additional capacity common wiring 114 are formed on the gate insulating film 113, and it is patterned so as to have a predetermined shape. As a result, a gate electrode 116a and an additional capacity upper electrode 114a are formed.
Thereafter, in order to determine a conduction type of the TFT 35, phosphorus ions (P+) with concentration of 1xc3x971015 (cmxe2x88x922) are implanted from the upper section of a gate electrode 116a, and a portion under the gate electrode 116a of the polycrystal silicon thin film 111 is a channel section 112 of the TFT 35.
A first inter-layer insulating film 115 is formed on the whole surface of the substrate 31 by using SiO2 or SiNx, and contact holes 118 and 119 are provided. Then, the source bus wiring 120 and a piling electrode (drain electrode) 121 are formed in the contact holes 118 and 119 by using metal with low resistance such as Al.
In the same manner as the first inter-layer insulating film 115, a second inter-layer insulating film 124 is formed on the whole surface of the substrate 31 by using SiO2 or SiNx, and a contact hole 123 is formed. Then, a picture element electrode 125 is formed by using a transparent conductive film such as ITO. When Al is used for the source bus wiring 120 and the piling electrode 121, for example, in order to bring the piling electrode 121 into ohmic contact with the picture element electrode 125, a barrier metal 126 is formed in the contact hole 123 by using metal such as Ti, TiW, Mo, MoSi.
However, the above-mentioned conventional liquid crystal display device has the following problems.
(1) First Problem
In the above arrangement, since the first and second inter-layer insulating films 115 and 124 are made of inorganic materials, the film thickness is small, i.e. several hundred nm, and the dielectric constant becomes higher than a usual organic material. For this reason, the capacity between the additional capacity common wiring 114 and the other wiring (for example, the source bus wiring 120) becomes large, and the additional capacity common wiring 114 is easily influenced by the other wirings. Therefore, when inorganic materials are used for the inter-layer insulating films 115 and 124, it is not preferable that the additional capacity section is formed so as to greatly overlap the other wirings.
In addition, when the picture element electrode 125 is arranged so as to overlap the gate bus wiring 116 or the TFT 35 on an area connected to the picture element 36, capacity Cgdxe2x80x2 is generated between the picture element electrode 125 and the gate bus wiring 116 or the TFT 35. When the TFT 35 is turned off, a voltage drop (xcex94V) of the picture element electrode 125 represented by the following equation occurs.
xcex94V=xcex94Vgxc3x97(Cgd+Cgdxe2x80x2)/(Cgd+Cgdxe2x80x2+Cs+CLC)
(xcex94Vg: potential difference between on-state and off-state of the gate, Cgd: capacity between gate and drain of TFT, Cs: additional capacity, CLC: liquid crystal capacity)
Since a d.c. component is applied to the liquid crystal due to the voltage drop, it is required to apply a bias voltage, for example, to the counter electrode.
In addition, since the additional capacity section does not have a light transmitting characteristic, an aperture ratio is lowered due to the additional capacity section. Moreover, the additional capacity common wiring 114 is formed on the layer where the gate bus wiring 116 is formed, and the additional capacity common wiring 114 does not have the light transmitting characteristic. As a result, the aperture ratio is lowered.
(2) Second Problem
Since the first inter-layer insulating film 115 is made of a inorganic material with a thickness of several hundred nm, disconnection of the source bus wiring 120 occurs due to unevenness of surface in a section where the source bus wiring 120 and the gate bus wiring 116 cross each other.
(3) Third Problem
In the above arrangement, the additional capacity common wiring 114 is formed by using the same material as the gate bus wiring 116, and the gate insulating film 113 just under the wiring 114 is used as a dielectric. Since the gate insulating film 113 is thin and its dielectric constant is high, even if the area is small, large additional capacity can be obtained. However, with this arrangement, when the gate bus wiring 116 is formed by a material with electrically higher resistance than the source bus wiring 120, propagation of a signal tends to be delayed in the additional capacity common wiring 114.
(4) Fourth Problem
In the liquid crystal display device having the above arrangement, a point-at-a time driving method is generally executed. As the other driving method, a line-at-a-time driving method exists, when the line-at-a-time driving is executed, a sampling capacitor for holding a sampled signal for 1 line is required. Moreover, since it is necessary to apply a transfer signal to be used for outputting the signals stored in the sampling capacitor to a hold capacitor all at once, the configuration of the circuit becomes complicated. The point-at-a-time driving does not require these capacitors, and thus a simple configuration of the circuit can be realized. Furthermore, the point-at-a-time driving method is usually used. However, the point-at-a-time driving method requires a higher speed of writing to the picture element through the TFT 35 compared to the line-at-a-time driving method. For this reason, when a-SiTFT is used as the TFT 35, the point-at-a-time driving is not executed, but when p-SiTFT is used, it can be executed.
In the point-at-a-time driving, video signals inputted to video lines 38 shown in FIG. 16 are successively sampled by the analog switches 39 of the source driving circuit 33 so as to be written to the source bus wirings 120. Thereafter, when the TFT 35 is turned on according to a signal from the gate driving circuit 32, the video signal written to the source bus wiring 120 is written to the picture element 36. Therefore, electric charges corresponding to the video signals written to the respective source bus wirings 120 should be securely held at least until the writing to all the source bus wirings 120 is completed.
When the capacity of the source bus wiring 120 is small, since an amount of electric charges written through the analog switches 39 is small, the writing to the picture element 36 is insufficient. As a result, insufficient contrast occurs. More specifically, when a inter-layer insulating film having a low dielectric constant and a large thickness is used, also the capacity formed in a portion where the source bus wiring 120 and another wiring cross each other becomes small. As a result, the capacity of the source bus wiring 120 becomes less and less.
As a method of preventing the insufficient contrast due to an insufficient capacity of the source bus wiring 120, for example, Japanese Unexamined Patent Publication No. 62-178296/1987 (Tokukaisho 62-178296) suggests that a sample hold capacity is formed by an MOS-type capacitor having the same structure as the TFT 35. However, such an MOS-type capacitor is liable to cause a dielectric breakdown due to static electricity during the rubbing treatment which is given to an alignment film on a side where the TFT 35 is provided after the process of manufacturing a substrate. Since the dielectric breakdown of the MOS-type capacitor causes a defect of line because a suitable signal cannot be written to the picture element which is connected to the source bus wiring 120 which is provided with this MOS-type capacitor.
As described in Japanese Unexamined Patent Publication No. 7-175082/1995 (Tokukaihei 7-175082), for example, such a defect of line can be corrected by forming a plurality of sample hold capacity parallel and by cutting off a defective capacity when the dielectric breakdown occurs. However, in this case, a new process for correcting the defect is added.
It is a first object of the present invention to provide a liquid crystal display device having high aperture ratio which does not cause lowering of the aperture ratio due to an additional capacity (common wiring).
Moreover, it is a second object of the present invention to prevent disconnection of a source bus wiring which is a conventional problem.
Furthermore, it is a third object of the present invention to provide a liquid crystal display device having high aperture ratio without a problem of delayed propagation of a signal in the additional capacity common wiring and a method of manufacturing the liquid crystal display device.
In addition, it is a fourth object of the present invention to provide a liquid crystal display device which includes a capacity having an arrangement without no defects in the source bus wiring, holding sufficient electric charges by means of the capacity and performing writing to picture elements.
In order to achieve the above objects, a liquid crystal display device of the present invention has:
a plurality of scanning lines provided on one of paired substrates;
a plurality of signal lines provided on the substrate so that the signal lines cross the scanning lines;
switching elements provided respectively to cross sections of the scanning lines and the signal lines;
a inter-layer insulating film made of an organic material provided on the switching elements;
a picture element electrode provided on the inter-layer insulating film; and
an additional capacity common wiring for forming an additional capacity section between the picture element electrode and the additional capacity common wiring, the additional capacity common wire being provided on said inter-layer insulating film.
In accordance with the above arrangement, the capacity between an additional capacity common wiring and the scanning lines or the signal lines can be ignored, and the additional capacity common wiring can be formed in a desired shape. For example, the additional capacity common wiring can be used as a light shielding film.
In the above arrangement, it is preferable that the above additional capacity common wiring is provided at least in a position where it overlaps the switching element. With this arrangement, the aperture ratio is hardly lowered due to the additional capacity common wiring. Moreover, in this case, it is desired that the additional capacity common wiring covers at least a PN junction in the switching element and functions as a light shielding film. As a result, the light directed to the liquid crystal display device 7 is not projected onto the switching element, thereby preventing lowering of display quality due to an increase in OFF-state currents.
Moreover, in the above arrangement, it is preferable that the additional capacity common wiring is provided at least in a position where it overlaps one of the scanning line and the signal line. With this arrangement, the lowering of the aperture ratio due to the additional capacity common wiring hardly occurs.
In addition, in the above arrangement, it is preferable that the additional capacity common wiring is made of a metal for bringing the drain electrode of the switching element into ohmic contact with the picture element electrode. When the additional capacity common wiring is formed by a metal for bringing the drain electrode into ohmic contact with the picture element electrode, the additional capacity lower electrode and the additional capacity common wiring as well as the metal can be simultaneously patterned. Therefore, an additional process for patterning the additional capacity lower electrode and the additional capacity common electrode is not required.
In addition, in the above arrangement, it is preferable that a counter substrate which is the other substrate of the paired substrates does not have a black matrix. Namely, in accordance with the arrangement that the counter substrate does not have a black matrix, it is not necessary to form a light shielding pattern in enough large size for its margin required for the lamination with the counter substrate. Therefore, the aperture ratio can be increased. Moreover, since only a transparent conductive film for switching a liquid crystal material is formed or the transparent conductive film and a color filter are formed on the counter substrate, the process for manufacturing the counter substrate becomes simple.
In addition, in the above arrangement, it is preferable that the dielectric constant of the insulating film used as a dielectric of the additional capacity is larger than the dielectric constant of the organic material used as the inter-layer insulating film. As a result, the additional capacity can be effectively formed in a small area.
It is preferable that an anodic oxide film is used as the dielectric of the additional capacity. Since the anodic oxide film has an excellent coating characteristic with respect to the additional capacity lower electrode and the additional capacity common wiring, the short-circuit of the additional capacity lower electrode and the additional capacity common wiring with the picture element electrode does not occur. Moreover, the process of forming an inorganic film by using the sputtering or CVD method is not required.
In addition, in order to achieve the above object, the liquid crystal display device of the present invention has:
a non-monocrystal silicon thin film, a gate insulating film and a gate bus wiring provided on one of paired substrates in this order;
a first inter-layer insulating film made of an organic material being laminated on the gate bus wiring; and
a source bus wiring, a second inter-layer insulating film and a picture element electrode being provided on the first inter-layer insulating film in this order.
In accordance with the above arrangement, since the first inter-layer insulating film is made of an organic material, a short-circuit between the gate bus wiring and the source bus wiring through the inter-layer insulating film generated when the inorganic material is used does not occur. Moreover, since the surface on which the source bus wiring is provided can be sufficiently made flat, the disconnection of the source bus wiring due to unevenness over the thin film transistor or the gate bus wiring can be prevented. Moreover, the capacity in the position where the gate bus wiring crosses the source bus wiring becomes smaller, thereby suppressing the delay of a signal generated in the bus wirings.
In the above arrangement, it is preferable that the second inter-layer insulating film is also made of an organic material. As a result, an electric field to be applied to the liquid crystal layer from the domain below the second inter-layer insulating film can be decreased.
Moreover, since the picture element electrode can be formed on the sufficiently flat surface, the rubbing process can be surely performed, thereby eliminating disorder of the alignment of liquid crystal.
In addition, it is preferable that the organic material is a photosensitive acrylic resin. When the photosensitive acrylic resin is used as the organic material, the contact hole can be easily formed by the exposing and developing processes, thereby simplifying the manufacturing process. Moreover, since the photosensitive acrylic resin has an excellent light transmitting characteristic, even when the liquid crystal display device is used as a transmission-type liquid crystal display device, the transmittance factor is not lowered.
In addition, in the above arrangement, it is preferable that the additional capacity is formed on the inner wall of at least one contact hole which goes through the first inter-layer insulating film. As a result, the non-light-transmitting domain due to the additional capacity can be small, thereby improving the aperture ratio of the liquid crystal display device.
In addition, it is preferable that a piling electrode is formed on the inner wall of the contact hole on which the above additional capacity is formed, and the piling electrode is used as a lower electrode of the additional capacity. As a result, the lower electrode of the additional capacity as well as the source bus wiring can be formed simultaneously, so it is not necessary to specially pattern the lower electrode of the additional capacity.
Furthermore, in the above arrangement, it is preferable that a light shielding film is formed on the first inter-layer insulating film. As a result, it is not necessary to form a light shielding film on the counter substrate, thereby further simplifying the manufacturing process. It is more preferable that the light shielding film is formed by the upper electrode of the additional capacity.
In addition, in order to achieve the above object, the liquid crystal display device of the present invention has:
a non-monocrystal silicon thin film, a gate insulating film and a gate bus wiring being provided in this order on one of paired substrates;
a first inter-layer insulating film, a source bus wiring, a second inter-layer insulating film and a picture element electrode being provided in this order on the gate bus wiring;
an additional capacity composed of an additional capacity upper electrode and an additional capacity lower electrode, the additional capacity upper electrode covering a contact hole provided on the first inter-layer insulating film and being made of the same material as the source bus wiring, the additional capacity lower electrode being made of the non-monocrystal silicon thin film.
In accordance with the above arrangement, since the additional capacity upper electrode is made of the same material as the source bus wiring, the resistance of the upper electrode is low, thereby arising no problems of the delayed propagation of a signal on the additional capacity upper electrode. Moreover, since the gate insulating film can be used as the dielectric of the additional capacity, the area of the additional capacity section as a light shielding film can be reduced.
In the above arrangement, it is preferable that the first inter-layer insulating film is formed by an organic material. As a result, the surface on which the source bus wiring is provided sufficiently flat, thereby preventing the disconnection of the source bus wiring due to unevenness over the thin film transistor or the gate bus wiring.
In addition, it is preferable that the organic material has photosensitivity. As a result, the contact hole can be formed on the first inter-layer insulating film only by the exposing and developing processes, thereby, simplifying the manufacturing process.
In addition, a method of manufacturing the liquid crystal display device having the above arrangement has:
the first step of forming the additional capacity lower electrode by using the non-monocrystal silicon; and
the second step of forming the additional capacity upper electrode by using the same material as the source bus wiring so that the additional capacity upper electrode covers a contact hole provided on the first inter-layer insulating film.
In accordance with the above mentioned, the delayed propagation of signals on the addition capacity common electrode can be eliminated without adding a new device or process to the method of manufacturing a conventional liquid crystal display device. Moreover, since the gate insulating film is used as the dielectric of the additional capacity, an area of the additional capacity section as a light shielding film can be reduced, thereby improving the aperture ratio of a liquid crystal panel.
In addition, when the method of forming the first inter-layer insulating film by using a photosensitive organic material, the contact hole can be formed on the first inter-layer insulating film by an optical method, i.e. a simple manufacturing process without the etching process. As a result, damage to the gate insulating film due to the etching process does not occur.
In addition, in order to achieve the above object, the liquid crystal display device of the present invention has:
a pair of substrates;
a liquid crystal layer sandwiched between the pair of substrates;
a display section composed of a plurality of picture elements;
a plurality of picture element electrodes provided respectively on the plurality of picture elements on one of the paired substrates;
a plurality of gate bus wirings and a plurality of source bus wirings for driving the plurality of picture elements;
an inter-layer insulating film which covers the gate bus wirings and the source bus wirings;
switching elements provided in intersections of the gate bus wirings and the source bus wirings; and
a covered electrode provided on a portion of the source bus wiring outside the display section, the covered electrode being connected to the source bus wiring through a contact hole of the inter-layer insulating film.
In accordance with the above arrangement, the contact hole is provided on the inter-layer insulating film on the source bus wiring located outside the display section, and the covered electrode is formed so as to cover the position of the source bus wiring. For this reason, when the pair of substrates are laminated, the disconnection of the source bus wiring in the section to which a sealing resin was applied can be prevented.
It is preferable that a counter electrode facing the covered electrode and the picture element electrode is formed on the other substrate, and the covered electrode, the counter electrode and the liquid crystal layer form a capacity for holding electric charges written to the source bus wiring. In other words, when the capacity is formed by the covered electrode, the liquid crystal material and the counter electrode, it is not necessary to form the capacity by specially utilizing the gate insulating film. Therefore, a defect in the lines due to an electrostatic breakage does not occur.
In addition, since the capacity of the source bus wiring can be larger, even if point sequential driving is performed, a decrease in an amount of the electric charges written from the analog switch can be prevented. Therefore, insufficient contrast, which is caused by insufficient writing of electric charges to picture elements, does not occur.
The covered electrode can be formed by the same material as the picture element electrode. Moreover, it is preferable that the covered electrode has a wider width than the source bus wiring.
In addition, the manufacturing process can be simplified by using a photosensitive acrylic resin as the inter-layer insulating film.
For fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.